Parallel Adder
A parallel adder is a digital circuit that can find the arithmetic sum of two binary numbers whose length size is greater than one bit. It has full adders connected in a chain where the output from each adder is connected to the input of the next higher-order full adder.
They incorporate carry lookahead logic to ensure addition speed is not limited during carrying propagation between subsequent stages of addition.
Working of a parallel adder:
Step 1: The full adder FA1 adds A1 and B1 along with the carry C1 and generates the sum S1. The carry C2 is connected to the later chain.
Step 2: The full adder FA2, uses the carry C2 to add with A2 and B2, generating the sum S2.
Step 3: The process is repeated till the last full adder FAn uses the last carry Cn.
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